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Cerebras SystemsCerebras SystemsBengaluru, India

Senior/Staff- Engineer: Post Silicon- Bring Up

Leads post-silicon bring-up, debugging, testing, and performance optimization for Cerebras Wafer Scale Engines. The role requires 7–10+ years of experience, substantial pre- and post-silicon ASIC expertise, strong programming and automation skills, and cross-functional collaboration across hardware and software teams.

Salary not listed
On-site7+ YOEHardware Engineering

About the role

Responsibilities

  • Develop and debug flows for Cerebras Wafer Scale Engines that embed tested, deployable optimizations into production processes to reduce time and cost.
  • Refine AI systems across hardware/software design constraints, including di/dt, V-F characterization, current limits, and temperature limits, in relation to performance optimizations.
  • Develop and enhance infrastructure for real-world workload testing on silicon.
  • Develop self-checking metrics and instrumentation for debugging and coverage.
  • Collaborate with silicon architects, designers, performance engineers, and software engineers to improve Wafer Scale Engine performance.
  • Work across software, design, verification, emulation, and validation to refine and optimize performance and processes.
  • Use CI/CD tools, Git repositories, GitHub, GitHub Actions, and Jenkins to streamline testing and release workflows.

Requirements

  • BS/BE/B.Tech or MS/M.Tech in EE, ECE, CS, or equivalent work experience.
  • 7–10+ years of industry experience.
  • 3–5 years of pre-silicon and post-silicon ASIC hardware experience.
  • Strong understanding of computer architecture and networking.
  • Excellent coding skills in Python, Verilog, SystemVerilog, and C.
  • Proficiency in hardware/software co-design and layered architectures.
  • Excellent debugging, analytical, and problem-solving skills.
  • Proficiency in large-scale testing and automation using pytest and Python.
  • Strong presentation and interpersonal skills, with the ability to collaborate across functions and drive issues to closure.

Nice-to-haves

  • Experience with AI/ML systems involving 100+ CPU cores and communication-fabric-based designs.
  • Familiarity with inline testing and diagnostics using CPU memory and execution with self-checking.
  • Knowledge of chip defect profiles and mitigation strategies across the hardware and software stack.
  • Experience creating large-scale test and software infrastructure.
  • Experience working across global time zones.

Compensation

  • For the Sunnyvale location, the base salary range is $175,000–$275,000 annually.
  • Actual compensation may include bonus and equity and will depend on experience, skills, and qualifications.

Skills

PythonverilogsystemverilogCpytestGitGitHub ActionsJenkinsasic hardwarecomputer architectureNetworkingCI/CDhardware/software co-designAI/ML

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