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Cerebras SystemsCerebras SystemsBengaluru, India

Senior/Staff Engineer : Post Silicon- Bring Up

Leads post-silicon bring-up and optimization of Cerebras Wafer Scale Engines, developing validation infrastructure, diagnostics, testing automation, and performance improvements across hardware and software. Requires 7–10+ years of industry experience and strong ASIC, coding, debugging, and cross-functional collaboration skills.

175k – 275k/yr
On-site7+ YOEHardware Engineering

About the role

Responsibilities

  • Develop and debug flows for Wafer Scale Engines that embed well-tested, deployable optimizations into production processes to reduce time and costs.
  • Refine AI systems across hardware/software design constraints, including di/dt, V-F characterization space, current limits, and temperature limits, in relation to performance optimizations.
  • Develop and enhance infrastructure for real-world workload testing on silicon.
  • Develop self-checking metrics and instrumentation for debugging and coverage.
  • Work with silicon architects, designers, performance engineers, and software engineers to improve Wafer Scale Engine performance.
  • Collaborate across software, design, verification, emulation, and validation to refine and optimize performance and processes.
  • Use CI/CD tools, Git repositories, GitHub Actions, and Jenkins; manage merge and release flows to streamline testing and releases.

Requirements

  • BS/BE/B.Tech or MS/M.Tech in EE, ECE, CS, or equivalent work experience.
  • 7–10+ years of industry experience.
  • 3–5 years of pre-silicon and post-silicon ASIC hardware experience.
  • Strong understanding of computer architecture and networking.
  • Excellent coding skills in Python, Verilog/SystemVerilog, and C.
  • Proficiency in hardware/software co-design and layered architectures.
  • Excellent debugging, analytical, and problem-solving skills.
  • Experience with large-scale testing and automation using pytest and Python.
  • Strong presentation and interpersonal skills, with the ability to collaborate cross-functionally and drive issues to closure.

Nice to Have

  • Experience with AI/ML systems involving 100+ CPU cores and communication-fabric-based designs.
  • Familiarity with inline testing and diagnostics using CPU memory and execution with self-checking.
  • Knowledge of chip defect profiles and mitigation strategies across the hardware and software stack.
  • Experience creating large-scale test and software infrastructure.
  • Experience working across global time zones.

Compensation

  • Base salary range: $175,000–$275,000 annually.
  • Actual compensation may include bonus and equity and will be determined by experience, skills, and qualifications.

Skills

wafer scale engineasicPythonverilogsystemverilogCcomputer architectureNetworkinghardware/software co-designpytestCI/CDGitHub ActionsJenkinsemulationsilicon validation

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