Hardware Platform Security Architect
Own hardware platform security at OpenAI by co-architecting secure silicon, hardware, and systems using technologies like TPM2, Secure Boot, Intel SGX, and AMD-SEV. Requires 10+ years in hardware security or co-design, strong coding in Rust/C++/Python, and cross-team collaboration.
About the job
Responsibilities
- Co-Architect Secure Silicon: Collaborate with cross-functional silicon teams (Silicon Design, DV, FW) and silicon partners (silicon test facilities, foundries) to develop secure silicon that meets the end-to-end system requirements.
- Co-Architect Secure Hardware: Collaborate with hardware vendors and cross-functional teams (kernel, compiler, infra) to design secure hardware that meets performance and security needs.
- Co-Architect Secure Systems: Architect and deploy systems using TPM2, Secure Boot, Nitro Enclaves, Intel SGX, AMD-SEV, and other secure hardware technologies.
- Drive Innovation: Engage with internal and external partners to align hardware innovations with OpenAI’s trusted computing and cryptographic requirements.
Requirements
- 10+ years of industry experience in hardware security or hardware–software co-design.
- Proven expertise in deploying secure hardware systems at scale and integrating secure hardware primitives.
- Strong coding skills in Rust and/or C/C++, with proficiency in Python.
- Proven ability to collaborate across teams, architect solutions, and debug complex production systems.
- A proactive, ownership-driven mindset with a focus on end-to-end problem solving.
Nice-to-Haves
- Advanced degree in Computer Architecture, Electrical Engineering, or related fields.
- Familiarity with HPC, low-precision computing, and SIMD architectures.
Skills
Hardware Security, Secure Silicon, Tpm2, Secure Boot, Nitro Enclaves, Intel Sgx, Amd-Sev, Rust, C++, C, Python, Hpc, Simd
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