Lead signal integrity design for AI supercomputers in data centers, collaborating on chip-to-system interconnects and performing simulations to resolve issues. Requires 10+ years experience in SI, SerDes, PCB, and data center hardware.
225k – 445k
Hybrid10+ YOEHardware Engineering
About the role
In this role, you will:
Lead system signal integrity (SI) design for AI supercomputer product in the data center application.
Collaborate with chip, package, boards, rack and system engineers, design partners to drive system SI design and develop innovative interconnect and high-speed technologies.
Identify and evaluate new technologies and methodologies to improve signal and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity.
Perform simulation and modeling to identify and troubleshoot signal integrity issues.
Lead system interconnect design, bring up and qualification.
As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings.
You might thrive in this role if you:
Have at least 10 years of industry experience, including experience design hardware system and SerDes testing for data center applications.
Have a strong bias toward action, and won’t take no for an answer.
Have experience and good knowledge of system design experience in the SI areas, from chip, SerDes, board, rack level.
Have experience with PCB, connector and cable design.
Have a strong intrinsic desire to learn and fill in missing skills; and an equally strong talent for sharing that information clearly and concisely with others.
Are comfortable with ambiguity and rapidly changing conditions.
Skills
Signal IntegritySerdesPcb DesignSimulationPower IntegritySystem InterconnectHardware DesignConnector DesignCable DesignData Center Hardware
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