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PCB Layout Engineering Lead

Leads physical implementation and production release of complex, high-speed PCBs for AI and server systems. Requires 10+ years of PCB layout experience, strong SI/PI expertise, and proficiency with Cadence Allegro.

About the job

Responsibilities

  • Own multilayer PCB layout from component placement through fabrication and assembly release.
  • Translate schematics, mechanical constraints, and electrical requirements into constraint-driven board designs.
  • Define board stackups, controlled-impedance structures, routing rules, reference planes, return paths, and length- and phase-matching constraints.
  • Place and route high-speed digital, high-current power, and sensitive analog circuits, including dense BGA fanout and differential interfaces.
  • Apply signal-integrity and power-integrity practices to minimize crosstalk, discontinuities, noise, voltage drop, and EMI.
  • Collaborate with electrical, SI/PI, mechanical, thermal, compliance, manufacturing, and test engineers.
  • Work with fabrication and assembly partners to validate stackups and via structures and improve yield, cost, and schedule.
  • Perform design reviews and DFM, DFA, and DFT checks.
  • Generate and verify fabrication drawings, assembly drawings, drill data, Gerbers, ODB++, IPC-2581, and related release packages.
  • Maintain component footprints, padstacks, design libraries, layout standards, and release documentation.
  • Support prototype builds, board bring-up, failure analysis, and production layout revisions.

Requirements

  • Bachelor’s degree in electrical engineering, electronics engineering, or a related field, or equivalent practical experience.
  • 10+ years of hands-on experience laying out complex, high-speed, multilayer printed circuit boards.
  • Expertise with Cadence Allegro PCB Designer and Constraint Manager; experience with Altium Designer or equivalent tools.
  • Strong knowledge of component placement, controlled-impedance routing, differential pairs, length matching, return-path continuity, and power distribution.
  • Experience with dense BGA escape routing, HDI structures, blind and buried vias, microvias, via-in-pad, and backdrilling.
  • Working knowledge of signal integrity, power integrity, EMI/EMC, thermal design, creepage and clearance, and high-current routing.
  • Experience applying IPC standards and fabrication, assembly, test, and manufacturability requirements.
  • Ability to create and review complete PCB fabrication and assembly release packages.
  • Experience working on server hardware, AI accelerators, datacenter hardware, GPUs, CPUs, TPUs, or server platforms.
  • Ability to work in a fast-paced environment and collaborate effectively with multidisciplinary teams.

Preferred Qualifications

  • Experience designing large, high-layer-count boards for compute, networking, server, or AI accelerator systems.
  • Experience routing DDR4/DDR5, PCIe Gen4/Gen5 or later, Ethernet, USB, and multi-gigabit SerDes interfaces.
  • Experience with high-current, low-voltage power delivery, VRM placement, decoupling strategy, copper balancing, and thermal optimization.
  • Experience developing Allegro SKILL scripts or other automation for layout and release efficiency.
  • Demonstrated success delivering first-pass functional boards and supporting products from prototype through volume production.

Compensation

  • Base salary range: $210,000–$230,000+ annually.
  • Additional compensation may include bonus and equity.

Skills

Pcb Layout, Cadence Allegro, Constraint Manager, Altium Designer, Signal Integrity, Power Integrity, Bga Routing, Hdi, Differential Pairs, Pcie, Ddr5, Serdes, Ipc Standards, Emi/Emc, Allegro Skill

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