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OpenAIOpenAI

SOC Architect

Leads definition and development of custom AI SoCs for edge ML inference, driving architecture, tradeoffs, and co-design with internal teams and silicon partners. Requires deep expertise in SoC subsystems, AI accelerators, and cross-functional leadership.

About the job

Responsibilities

  • Define the architecture and technical roadmap for custom SoCs targeted for edge applications.
  • Drive system-level tradeoff analysis across compute, memory, interconnect, power, thermal, and cost constraints.
  • Architect energy-efficient ML compute subsystems optimized for inference workloads and real-world deployment environments.
  • Collaborate with internal hardware, software, systems, and product teams to align architecture with platform needs.
  • Partner with external silicon vendors, IP providers, and manufacturing partners to execute development plans.
  • Lead hardware/software co-design efforts to maximize performance per watt and end-to-end system efficiency.
  • Guide implementation teams through microarchitecture, RTL development, validation, and bring-up phases.
  • Operate effectively in agile development environments and help teams deliver against aggressive schedules and milestones.

Requirements

  • Proven experience defining and delivering complex SoC or ASIC architectures from concept to production.
  • Deep understanding of AI/ML accelerators, edge inference workloads, and energy-efficient compute design.
  • Strong knowledge of SoC subsystems including CPU/GPU/NPU architectures, memory hierarchies, interconnects, and power management.
  • Experience working with both internal engineering organizations and external strategic partners.
  • Ability to lead cross-functional teams in fast-paced, execution-driven environments.
  • Strong communication skills with the ability to influence technical direction across organizations.

Preferred Qualifications

  • Experience with edge AI devices, embedded systems, or consumer hardware platforms.
  • Background in performance modeling, silicon cost optimization, and workload-driven architecture.
  • Familiarity with advanced process nodes and modern semiconductor development flows.

Skills

Soc Architecture, Asic Design, Ai/Ml Accelerators, Cpu/Gpu/Npu, Memory Hierarchies, Interconnects, Power Management, Rtl Development, Hardware/Software Co-Design, Performance Modeling

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