Design Verification Engineer
Develop verification strategies, reusable testbenches, and coverage plans for large-scale AI chip designs. Requires 3+ years of Design Verification experience with SystemVerilog, UVM, and strong debugging skills.
About the job
Key Responsibilities
- Work with architects, designers, post silicon and software engineers to ensure a high-quality design that works for silicon.
- Develop and implement verification strategies, detailed tests and coverage plans based on micro-architecture.
- Create verification methodologies and reusable environments, including components such as stimulus, checkers, assertions, and coverage.
- Implement tests, manage regressions, gather coverage, and debug test failures.
- Collaborate with cross-functional teams including architecture, RTL design, physical design, firmware, and validation.
- Analyze and debug complex issues across simulation, emulation, and silicon bring-up phases.
- Continuously enhances verification infrastructure and flows to improve efficiency and quality.
- Contribute to the evolution of the overall verification methodology and best practices across the organization.
Skills and Qualifications
- Great debugging and problem-solving skills.
- Deep knowledge of SystemVerilog testbench, DPI and UVM.
- Excellent programming skills and knowledge of software engineering practices including object-oriented design.
- Experience developing scalable and portable testbenches and components.
- Experience with verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection, and gate level simulations.
- Proficient in scripting languages such as Python or Perl.
- Good interpersonal skills and the ability to work as a standout colleague are a must.
- Extremely self-motivated and eager to solve problems.
- 3+ years of Design Verification experience.
Desired Skills and Qualifications
- Knowledge of pipelined processor architecture.
- BS or MS in Computer Science or Electrical Engineering.
- 3+ years of hands-on Design Verification experience.
Compensation
- The base salary range for this position is $190,000 to $230,000 annually. Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.
Skills
Systemverilog, Uvm, Dpi, Python, Perl, Rtl Design, Verification Methodologies, Object-Oriented Design, Waveform Viewers, Gate Level Simulations
Similar jobs
Embedded Engineering jobs
Applied Intuition
Sunnyvale, CA
Develops reliable embedded software and custom device solutions, integrating vendor components, sensors, operating systems, and communication interfaces. Requires a bachelor's degree and at least three years of relevant experience with C/C++, embedded Linux, debugging, and CI/CD tools.
Zoox
Foster City, CA
Develops operating-system platforms, device drivers, and infrastructure for autonomous-vehicle robotics systems. The role requires 4+ years of production software experience, strong Linux internals expertise, and proficiency in C/C++ plus scripting languages.
Applied Intuition
Sunnyvale, CA
Develops real-time perception, sensor-control, and fusion software for heterogeneous autonomous vehicle platforms, integrating ML algorithms across sensors and embedded systems. Requires advanced engineering education or 5+ years of relevant experience, multi-modal sensing expertise, Linux/Docker proficiency, and U.S. security-clearance eligibility.
OpenAI
San Francisco, CA
Build and harden OS foundations for AI consumer devices, spanning kernel, services, security, performance, and application interfaces. Requires strong systems programming in C/C++, kernel experience, and debugging skills.
Applied Intuition
Ann Arbor, MI
Develops, deploys, and maintains software for autonomous vehicles, integrating sensors, autopilots, and perception modules with hands-on field testing. Requires 5+ years experience or MS/PhD, C++/Python/Linux proficiency, and robotics knowledge.