Research Engineer - Post-Training
Post-trains frontier AI models using reinforcement learning to autonomously handle semiconductor design tasks like chip architecture optimization, RTL code generation, simulations, and verification. Collaborates with hardware experts to build RL environments, reward functions, and evaluation frameworks.
About the job
Responsibilities
- Post-train frontier models to autonomously perform complex tasks across the semiconductor design and verification pipeline.
- Propose and optimize chip architectures.
- Generate and refine RTL code.
- Run simulations.
- Identify verification gaps and iteratively improve designs.
- Collaborate with hardware design, verification, and computer architecture experts to design reinforcement learning environments.
- Develop structured reward functions, scaling strategies, and evaluation frameworks.
Requirements
- Experience creating and scaling RL environments for LLMs or multimodal agents.
- Building high-quality evaluation datasets and benchmarks for complex reasoning or design tasks.
- Working closely with domain experts in hardware and verification to define evaluation metrics, constraints, and simulation conditions.
- Designing reward functions and feedback pipelines that balance correctness, performance, and design efficiency.
- Running large-scale RL fine-tuning or post-training experiments for frontier models.
- Applying reinforcement learning or curriculum learning to structured reasoning or symbolic domains.
Skills
Reinforcement Learning, LLMs, Multimodal Agents, Rl Environments, Evaluation Datasets, Benchmarks, Rtl, Hardware Design, Verification, Chip Architecture, Reward Functions, Rl Fine-Tuning, Curriculum Learning, Semiconductor Design
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