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Cerebras Systems

AI Silicon Physical Design Engineer

Performs physical design for AI silicon chips, including synthesis, place & route, timing closure, and verification for high-speed wafer-scale architectures. Requires 10+ years experience with EDA tools and scripting.

150k – 250kSunnyvale, CACaliforniaHardware EngineeringRemote10+ YOE
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About the role

Responsibilities

  • Synthesize, place, and route high speed designs.
  • Experience the full spectrum of physical design and implementation.
  • Collaborate closely with the RTL team and integrate blocks into the full-chip architecture.

Requirements

  • 10+ years of physical design & physical verification experience.
  • Strong knowledge of block level and full-chip physical verification methodology.
  • Strong experience in block/subsystem timing closure.
  • Expert at optimizing for the best power/performance and area.
  • Experience with the complete physical design flow. Knowledge of Synopsys tool suite is a plus.
  • Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues.
  • Expert with IR/EM analysis and resolution.
  • Good understanding of full chip floor planning and integration.
  • Strong ability in scripting languages like Tcl and Python. Ability to make flow enhancements.
  • Demonstrated ability to work with RTL teams to optimize for physical design.
  • Knowledge of CPU/GPU design a plus.
  • Skills in Design Compiler, Fusion Compiler, ICC2 or similar physical design tools.
  • BS or MS in Electrical Engineering.

Compensation

  • Salary range: $150,000 – $250,000 annually. Actual compensation determined by experience, skills, qualifications, and location.

Skills

Physical DesignPhysical VerificationTiming ClosureDrcLvsIr/Em AnalysisFloor PlanningTclPythonSynopsys Design CompilerFusion CompilerIcc2IcvCalibre

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