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Cerebras SystemsCerebras SystemsSunnyvale, CA

Design Verification Engineer

Design Verification Engineer developing verification strategies, reusable testbenches, and coverage plans for large-scale AI chip designs using SystemVerilog and UVM. Requires 3+ years of DV experience and strong debugging skills.

120k – 240k
On-site3+ YOEEmbedded Engineering

About the role

Key Responsibilities

  • Work with architects, designers, post-silicon, and software engineers, to ensure a high-quality design that works for silicon.
  • Develop and implement verification strategies, detailed tests, and coverage plans based on micro-architecture.
  • Create verification methodologies and reusable environments, including components such as stimulus, checkers, assertions, and coverage.
  • Implement tests, manage regressions, gather coverage, and debug test failures.
  • Collaborate with cross-functional teams, including architecture, RTL design, physical design, firmware, and validation.
  • Analyze and debug complex issues across simulation, emulation, and silicon bring-up phases.
  • Continuously enhances verification infrastructure and flows to improve efficiency and quality.
  • Contribute to the evolution of the overall verification methodology and best practices across the organization.

Skills and Qualifications

  • Advanced debugging and problem-solving skills.
  • Deep knowledge of SystemVerilog testbench, DPI, and UVM.
  • Excellent programming skills and knowledge of software engineering practices, including object-oriented design.
  • Experience developing scalable and portable testbenches and components.
  • Experience with verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection, and gate-level simulations.
  • Proficient in scripting languages such as Python or Perl.
  • Good interpersonal skills and the ability to work as a standout colleague are a must.
  • Extremely self-motivated and eager to solve problems.
  • 3+ years of Design Verification experience.

Desired Skills and Qualifications

  • Knowledge of pipelined processor architecture.
  • BS or MS in Computer Science or Electrical Engineering.
  • 3+ years of hands-on Design Verification experience.

Compensation

  • The base salary range for this position is $120,000 to $240,000 annually.
  • Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.

Skills

SystemverilogUvmDpiPythonPerlRtl DesignVerification MethodologiesWaveform ViewersGate-Level SimulationsObject-Oriented Design

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