Research Engineer, AI for Chip Design
Research Engineer developing reinforcement-learning environments, evaluations, and training workflows that enable AI models to solve chip-design problems. The role requires strong software and experimental skills, with experience in applied ML research and opportunities to work with RTL and EDA tools.
About the job
Responsibilities
- Build reinforcement learning environments and evaluations for tasks including RTL generation, design verification, and physical design optimization.
- Develop and test approaches that help models use chip-design tools while improving power, performance, and area and preserving correctness.
- Design experiments, establish baselines, and measure whether improvements generalize to new tasks and designs.
- Investigate failures across model behavior, rewards, evaluation tools, and experiment infrastructure.
- Improve iteration speed through better tooling, faster evaluations, and proxy rewards aligned with desired outcomes.
- Turn successful experiments into reusable research code and training workflows in collaboration with research, software, and hardware teams.
Requirements
- Strong programming and debugging skills, with a record of turning technical ideas into working software.
- Experience with reinforcement learning, model evaluations, post-training, or applied machine learning research.
- Experience building tool-using agents, reward functions, or automated evaluation systems.
- Ability to formulate hypotheses, design experiments, and distinguish meaningful results from noise or evaluation errors.
- Ability to work independently on ambiguous problems and make practical implementation decisions.
- Strong implementation focus and ability to explain what was built, what failed, and what was learned.
- Clear communication and effective cross-functional collaboration.
Nice-to-haves
- Familiarity with experiment orchestration, distributed training, or research infrastructure.
- Experience with RTL, Verilog/SystemVerilog, EDA tools, formal verification, or chip-design automation.
Compensation
- Annual compensation: $380,000–$500,000.
Skills
Reinforcement Learning, Machine Learning, Python, Model Evaluation, Post-Training, Tool-Using Agents, Reward Functions, Experiment Orchestration, Distributed Training, Rtl, Verilog, Systemverilog, Eda Tools, Formal Verification, Chip Design Automation
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