Architect new AI chip features by translating specs into micro-architecture requirements, building performance/power models, and conducting PPA trade-offs. Requires 10+ years in performance modeling for GPUs/CPUs/accelerators and a Master's or PhD.
Salary not listed
On-site10+ YOEHardware Engineering
About the role
Responsibilities
Translate high level architecture spec to micro-architecture feature requirements
Bring up new features in the performance/power model
Perform comprehensive PPA trade-offs for new architectural features
Extract insights for new features and micro-architecture power efficiency
Profile workloads, identify bottlenecks and project competition performance for benchmarking
Engage with SW teams for end-end application level modeling at cluster level
Staff Hardware Systems Engineer responsible for full lifecycle of high-performance GPU/CPU compute systems at Crusoe, with deep focus on debugging and validation of PCIe, InfiniBand, and NVMe/storage subsystems. Requires 8+ years experience, strong hardware expertise, and automation skills to ensure reliability and scalability of AI infrastructure.
208k – 253k/yr
On-site8+ YOEHardware Engineering
Data Center Research & Development Engineer, Mechanical
OpenAISan Francisco, CA
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260k – 385k/yr
On-site20+ YOEHardware Engineering
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Lead electrical and MEP design, operation, and maintenance for large-scale AI data center campuses at OpenAI. Requires 10+ years in critical infrastructure, deep expertise in power/cooling systems, vendor management, and a PE license.
360k – 530k/yr
Hybrid10+ YOEHardware Engineering
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Shield AIDallas, TX
Staff Engineer responsible for the full mechanical design lifecycle of electro-mechanical and hydro-mechanical landing gear systems for autonomous UAVs, including concept development, CAD, analysis, prototyping, testing, and cross-functional collaboration with avionics and structures teams.
130k – 200k/yr
On-site7+ YOEHardware Engineering
Staff Engineer, Mechanical & Actuated Systems
Shield AIDallas, TX
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