Designs, develops, and tests FPGA networking and DSP blocks for phased-array antenna communication systems, supporting architecture, prototyping, field diagnostics, and deployment. Requires a bachelor’s degree, 2–4+ years of professional experience, and expertise in Verilog and SystemVerilog.
120k – 170k/yr
Remote2+ YOEHardware Engineering
About the role
Responsibilities
Design, implement, and test networking and DSP blocks on FPGAs for high-rate, parallel data processing.
Lead complex, multidisciplinary projects from initial design and prototyping through shipment and operations.
Drive system architectures, analyze tradeoffs, and scope system requirements.
Analyze performance data from in-field testing to diagnose and fix issues and provide feedback for product improvements.
Requirements
2–4+ years of professional experience.
Bachelor’s degree in Electrical Engineering or an equivalent field.
Expert knowledge of Verilog and SystemVerilog.
Experience with Python.
Experience with DSP and/or networking on FPGA.
Experience with FPGA SoCs.
Experience using laboratory equipment, such as oscilloscopes and spectrum analyzers, to debug high-speed FPGA designs.
Onsite work is preferred, though mostly remote work with some travel to the office is acceptable.
Nice-to-haves
Experience with HLS.
Experience with C++ or Rust.
Experience with high-performance PCBA architecture and design, including FPGA use.
Compensation and Benefits
FPGA Engineer/Level 1: $100,000–$120,000 per year.
FPGA Engineer/Level 2: $120,000–$160,000 per year.
Actual level and base salary are determined case by case based on job-related knowledge, skills, education, and experience.
Potential eligibility for equity, including stock options or other long-term incentives, and performance bonuses.
Medical, vision, and dental coverage.
401(k) retirement plan.
Short- and long-term disability insurance.
Life insurance.
Paid parental leave.
Paid time off.
Additional perks and discounts.
Additional Requirements
To conform to U.S. Government space technology export regulations, including ITAR, applicants must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.
Skills
fpgaverilogsystemverilogPythondigital signal processingNetworkingfpga socshlsC++Rustoscilloscopesspectrum analyzerspcba design
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