Senior Performance Architect

Responsibilities

• Analyze application performance across the full stack: C++/Python source, compiler output, assembly, and hardware execution
• Identify and localize performance bottlenecks to specific code regions, assembly sequences, or architectural limitations
• Implement proof-of-concept fixes and optimizations to validate proposed solutions before broader rollout
• Develop and maintain profiling infrastructure, benchmarks, and performance regression tests
• Collaborate with compiler engineers to improve code generation and optimization passes
• Work with hardware architects to identify microarchitectural improvements and validate performance models
• Create performance models that predict workload behavior and guide optimization priorities
• Document findings and communicate performance insights to both technical and non-technical stakeholders
• Support customer engagements by analyzing their workloads and recommending optimizations

Requirements

• BS/MS in Computer Science, Computer Engineering, or Electrical Engineering with 5+ years of performance analysis experience
• Strong proficiency in C++ and Python; ability to read, reason about, and write optimized code at the assembly level
• Hands-on mentality: comfortable implementing proof-of-concept solutions, not just identifying problems
• Deep understanding of computer architecture: pipelines, caches, memory hierarchies, SIMD/vector execution
• Experience with profiling tools (perf, VTune, custom trace analysis) and performance debugging methodologies
• Ability to trace performance issues from application behavior down to microarchitectural root causes
• Strong analytical and problem-solving skills with attention to detail
• Excellent communication skills; ability to explain complex performance issues to diverse audiences
• Experience working cross-functionally with compiler, runtime, and hardware teams

Nice to Have

• Experience with ML/AI workloads and frameworks (PyTorch, TensorFlow, ONNX)
• Background in compiler development or code generation
• Experience with GPU, DSP, or custom accelerator architectures
• Familiarity with cycle-accurate simulation and performance modeling tools