Latest Hardware Engineering jobs at Quadric

Design and integrate SoC RTL subsystems, third-party IP, and architecture for next-generation edge AI processors. The role requires 5+ years of SoC/ASIC front-end experience, strong SystemVerilog or Verilog skills, and expertise in computer architecture, low-power design, and subsystem development.

Designs and implements microarchitecture and RTL for innovative neural processing unit using SystemVerilog/SystemC. Optimizes PPA, contributes to timing closure, requires 5+ years CPU/GPU/ASIC experience and strong computer architecture background.