FPGA/Firmware Manager

Responsibilities

• Manage and mentor a small team of direct reports
• Own development of HDL and firmware on custom FPGA, FPGA SoC and low-level embedded systems
• Provide early guidance and input on architecture decision for subsystem and vehicle-level architectures
• Define requirements and processes to ensure traceability and progress tracking
• Contribute to custom HDL modules for FPGA systems (focus on high speed data movement and handling)
• Design firmware for soft cores (MicroBlaze, RISC-V, etc.) platforms to interface with FPGA fabric and peripherals
• Write custom HDL to interface with SoC hard cores, drivers and corresponding custom firmware
• Work with electrical engineers and others to support the bring-up of custom hardware
• Establish performance goals, conduct reviews, and foster a culture of innovation and accountability
• Lead verification of HDL and firmware to ensure flight-readiness

Required Qualifications

• 8+ years of experience developing firmware, or, HDL for FPGAs in a professional environment
• 2+ years of experience managing an engineering team
• Bachelor’s degree in Electrical Engineering, Computer Science, Mathematics, or related field
• Demonstrated work in RTL design using VHDL, Verilog, and/or SystemVerilog
• Proficiency with FPGA design tools (Xilinx Vivado, Microchip Libero, or similar)
• Experience developing firmware in bare-metal or RTOS environments
• Experience developing embedded systems using C/C++
• Strong understanding of digital design and embedded systems principles
• Ability to obtain a Secret and/or TS/SCI security clearance

Preferred Qualifications

• Interest in mentoring and developing engineering talent
• Experience with high-level synthesis (HLS) tools (e.g. Xilinx Vitis HLS, MATLAB FPGA generator)
• Experience with FPGA verification techniques (formal verification, UVM, SystemVerilog assertions)
• Familiarity with Xilinx Ultrascale, Zynq MPSoC, Versal, and/or Microchip PolarFire platforms
• Proficiency working with firmware development tools such as JLink, Keil, IAR, or GCC
• Experience with FreeRTOS and embedded Linux
• Strong understanding of FPGA timing, floor planning, and clock domain crossing best practices
• Experience with AMBA bus architectures (AXI, AHB, APB) and custom AXI IP design
• Experience with high-speed serial interfaces (GbE, PCIe, Aurora, LVDS) and low-speed interfaces (RS422, UART, I2C, SPI)
• Familiarity with RAM architectures, efficient buffering techniques, and FLASH interfaces (ONFi)
• Experience with image sensors and camera systems

Compensation

• $175,000 – $225,000 USD