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Shield AIShield AIDallas, TX

Staff Engineer, FPGA Design

Staff FPGA Design Engineer responsible for designing, implementing, verifying, and debugging high-performance FPGA solutions for UAV avionics and flight control systems. Requires strong digital design experience with VHDL/SystemVerilog, timing closure, and cross-functional collaboration.

150k – 230k/yr
On-site7+ YOEEmbedded Engineering

About the role

Responsibilities

  • Design and develop FPGA-based communication modules for advanced UAV platforms.
  • Develop solutions that enable precise timing synchronization and redundancy across flight controllers.
  • Integrate FPGA solutions with system-level architecture in collaboration with cross-functional engineering teams.
  • Perform synthesis, implementation, timing closure, bitstream generation.
  • Debug, test, and optimize for reliability, latency, and throughput.
  • Collaborate with PCB designers during board bring-up and hardware validation.
  • Contribute to FPGA architecture discussions and help define long-term technical direction within the platform.
  • Participate in design reviews and maintain engineering documentation.

Requirements

  • B.S., M.S, or PhD degree in Electrical Engineering, Computer Engineering or STEM discipline.
  • Strong experience with FPGA design, implementation, and verification using VHDL or SystemVerilog.
  • Demonstrated ability to build reliable, high-performance digital communication systems.
  • Solid understanding of timing closure, clock domain crossing, and system-level integration.
  • Comfortable working in a fast-paced, collaborative environment with evolving requirements.
  • Strong debugging and problem-solving skills.
  • Knowledge of FPGA timing analysis and timing closure techniques.
  • Familiarity with version control tools such as Git.

Nice-to-Haves

  • Experience with Xilinx FPGA ecosystem (Vivado, toolchains, etc).
  • In-depth understanding of ethernet and network stack implementation.
  • Experience developing flight computers.
  • Experience designing solutions for safety-critical real-time systems.
  • Experience with AXI4, AXI-Stream, and memory-mapped interfaces.
  • Experience using TCL scripting to automate FPGA build flows.
  • Knowledge of CI/CD practices for FPGA development.

Skills

fpga designvhdlsystemverilogxilinx vivadotiming closureaxi4axi-streamtcl scriptingGitethernetCI/CD
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