Skip to content
AnthropicAnthropicSan Francisco, CA

Research Engineer, Chip Design RL

Research Engineer advancing RL for silicon chip design at Anthropic. Design RL environments for RTL generation, verification, and physical optimization; requires deep ASIC/FPGA expertise from spec to tapeout.

500k – 850k
Hybrid7+ YOEML Engineering

About the role

Responsibilities

  • Invent, design, and implement RL environments and evaluations for agentic RTL generation, design (including formal) verification, physical design optimization.
  • Work on cross-cutting RL considerations such as EDA-tool latency optimization and proxy rewards.
  • Conduct experiments and shape our roadmap.
  • Deliver your work into research and production training runs.
  • Collaborate with other researchers and engineers across and outside Anthropic.

Requirements

  • Expertise in ASIC or FPGA design: RTL, design verification (UVM, formal methods, coverage-driven), physical design (synthesis, place-and-route, timing closure), PPA optimization, DFT, ECOs.
  • Fluent with industry EDA tools and processes.
  • Taped out chips and experience going from spec to silicon.
  • Know how to balance research exploration with engineering implementation.
  • Passionate about AI's potential and committed to developing safe and beneficial systems.
  • Bachelor’s degree or an equivalent combination of education, training, and/or experience in a relevant field.

Nice-to-Haves

  • Experience with reinforcement learning, evaluations or environments.
  • Built tooling or automation around chip design flows.
  • Worked on ML accelerators or high-performance compute hardware.
  • Familiarity with high-level synthesis or architecture simulators.

Skills

Reinforcement LearningRtlAsic DesignFpga DesignUvmFormal VerificationEda ToolsPhysical DesignPpa OptimizationDftEcosPython

Similar roles

ML Engineering jobs
Anthropic

Research Engineer, Code RL

AnthropicSan Francisco, CA +1

Research Engineer advancing Claude's code generation capabilities through reinforcement learning. Design RL environments, build verifiers, run training experiments on frontier models, and improve training pipelines for real software engineering tasks.

500k – 850k
Hybrid7+ YOEML Engineering
OpenAI

Inference Technical Lead, On-Device Transformers

OpenAISan Francisco, CA

Technical lead evaluating hardware platforms and co-designing transformer models for on-device deployment. Leads team building low-level inference stack, optimizing for latency, memory, and power constraints. Requires deep experience with accelerators, transformers, and performance-critical ML software.

445k – 445k
HybridML Engineering
Anthropic

Software Engineer, Research Infrastructure

AnthropicSan Francisco, CA +1

Build and scale research infrastructure and distributed systems at Anthropic to accelerate ML research workflows. Independently lead complex multi-month projects, drive cross-org alignment, and partner with researchers in a fast-evolving, ambiguous environment.

405k – 625k
Hybrid7+ YOEML Engineering
OpenAI

Inference Technical Lead, Sora

OpenAISan Francisco, CA

Leads GPU inference engineering for Sora, optimizing model serving efficiency, kernel-level performance, and scalability. Collaborates with research and product teams to build reliable infrastructure for multimodal AI models.

380k – 380k
HybridML Engineering
Anthropic

Research Engineer, Life Sciences

AnthropicSan Francisco, CA

Research Engineer developing novel evaluation frameworks and training strategies for AI systems in life sciences and biology. Requires experience training/evaluating LLMs, Python/ML proficiency, and data pipeline expertise; biology background preferred but not required.

350k – 500k
Hybrid8+ YOEML Engineering