ASIC Architect
Sunnyvale, CAHardware EngineeringOnsite10+ YOE
Summary
Architect new AI chip features by translating specs into micro-architecture requirements, building performance/power models, and conducting PPA trade-offs. Requires 10+ years in performance modeling for GPUs/CPUs/accelerators and a Master's or PhD.
About the role
Responsibilities
- Translate high level architecture spec to micro-architecture feature requirements
- Bring up new features in the performance/power model
- Perform comprehensive PPA trade-offs for new architectural features
- Extract insights for new features and micro-architecture power efficiency
- Profile workloads, identify bottlenecks and project competition performance for benchmarking
- Engage with SW teams for end-end application level modeling at cluster level
- Identify kernel level HW acceleration level opportunities
Qualifications
- Masters/PhD in Electrical/Computer Engineering
- 10+ years of experience across performance analysis and modeling across GPUs, CPUs or accelerator products
- Strong background in computer architecture and key high level architectural trade-offs
- Comfortable standing up new performance models from scratch in Python or similar analytical environments
- Exposure to micro-code (kernel) performance bottlenecks and optimization techniques
- Good understanding of how high-level workloads map to underlying micro-architecture is desired
- Understanding of basic ML workload profiling techniques and model network architecture is preferred
Skills
PythonComputer ArchitecturePerformance ModelingGPU ArchitectureCPU ArchitecturePPA AnalysisWorkload ProfilingMicro-architectureML Workload AnalysisPerformance Analysis