# ML Research Engineer - Hardware Codesign

**Company:** [OpenAI](https://hotfix.jobs/companies/openai)
**Location:** San Francisco, CA
**Role:** ML Engineering
**Salary:** $185k – $455k/yr
**Skills:** Python, C++, Rust, Triton, CUDA, PyTorch, JAX, Rtl, Roofline Simulator, Quantization
**Posted:** 2026-01-13

> Research-Hardware Codesign Engineer bridges ML research and silicon architecture, debugging performance gaps, writing quantization kernels, prototyping numerics in RTL, and analyzing system tradeoffs for AI-optimized hardware.

## Job Description

## In this role you will:
- Build on our roofline simulator to track evolving workloads, and deliver analyses that quantify the impact of system architecture decisions and support technology pathfinding.
- Debug gaps between performance simulation and real measurements; clearly communicate root cause, bottlenecks, and invalid assumptions.
- Write emulation kernels for low-precision numerics and lossy compression schemes, and get Research the information they need to trade efficiency with model quality.
- Prototype numerics modules by pushing RTL through synthesis; hand off novel numerics cleanly, or occasionally own an RTL module end-to-end.
- Proactively pull in new ML workloads, prototype them with rooflines and/or functional simulation, and drive initial evaluation of new opportunities or risks.
- Understand the whole picture from ML science to hardware optimization, and slice this end-to-end objective into near-term deliverables.
- Build ad-hoc collaborations across teams with very different goals and areas of expertise, and keep progress unblocked.
- Communicate design tradeoffs clearly with explicit assumptions and confidence levels; produce a trail of evidence that enables confident execution.

## You Will Thrive in this Role if:
- An exceptional track record of high-quality technical output, and a bias for shipping a prototype now and iterating later in the absence of clear requirements.
- **Strong Python, and C++ or Rust**, with a cautious attitude toward correctness and an intuition for clean extensibility.
- Experience writing **Triton, CUDA**, or similar, and an understanding of the resulting mapping of tensor ops to functional units.
- Working knowledge of **PyTorch or JAX**; experience in large ML codebases is a plus.
- Practical understanding of floating point numerics, the ML tradeoffs of reduced precision, and the current state of the art in model quantization.
- Deep understanding of transformer models, and strong intuition for transformer rooflines and the tradeoffs of sharded training and inference in large-scale ML systems.
- Experience writing **RTL** (especially for floating point logic) and understanding of PPA tradeoffs is a plus.
- Strong cross-functional communication (e.g. across ML researchers and hardware engineers); ability to slice ambiguous early-incubation ideas into concrete arenas in which progress can be made.

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