# Host and Network IO FPGA Engineer

**Company:** [Cerebras Systems](https://hotfix.jobs/companies/cerebras-systems)
**Location:** Sunnyvale, CA
**Role:** Hardware Engineering
**Experience:** 5+ years
**Skills:** fpga, verilog, Git, rtl, timing closure, simulation, wireshark, tcp, roce, network switches, arista, juniper, network debugging, bitstreams, board bring-up
**Posted:** 2026-08-06

> Design and lead FPGA-based host and network IO systems spanning chassis-to-wafer communication, RoCE networking, switching fabrics, and proprietary serial IO. The role requires production FPGA experience, Verilog expertise, timing closure, and network protocol/debugging knowledge.

## Job Description

## Responsibilities
- Lead full chassis-to-wafer IO architecture and design.
- Improve current RTL, implement next-generation FPGA designs, and define future IO architectures.
- Produce production-ready bitstreams for deployment into large clusters running customer inference services.
- Work with the design verification team to prevent bug slips and simplify debugging.
- Optimize bandwidth and latency across FPGA datapaths and all IO interfaces.
- Interface with board teams to facilitate and execute board bring-up.
- Drive network performance debugging of large AI clusters.
- Integrate leading-edge networking technologies and protocols.
- Lead cross-functional technical projects spanning multiple teams and integrating software and hardware components.
- Foster clear and effective communication across teams and stakeholders.

## Requirements
- 5+ years of industry experience generating production FPGA solutions, or a master's/PhD in Computer or Electrical Engineering plus 3 years of industry experience.
- Proficiency in Verilog development in a Git-based repository.
- Strong productivity with FPGA placement and routing, timing closure, simulation, debugging, and related FPGA workflows.
- Familiarity with network protocols including TCP and RoCE.
- Experience with network debugging tools such as Wireshark.
- Knowledge of network switch environments such as Arista and Juniper, or willingness to learn.
- Experience optimizing FPGA datapaths and IO interfaces for bandwidth and latency.

## Compensation and Benefits
- Work on a breakthrough AI platform and high-performance AI supercomputers.
- Opportunities to publish and open-source cutting-edge AI research.
- Startup vitality with job stability and a non-corporate work culture.
- Continuous learning, growth, and support in an inclusive work environment.

## Similar roles

- [Supervisor, Data Center Facilities](https://hotfix.jobs/jobs/880451a8-bb5b-4269-8157-7459b9686ec0) - xAI - Memphis, TN
- [Manager, Data Center Facilities](https://hotfix.jobs/jobs/ba373096-1f75-4946-93bf-6f96bf640462) - xAI - Memphis, TN
- [Materials Engineer](https://hotfix.jobs/jobs/771b36b3-9a04-42d7-b6e8-bda09ab95fa4) - Standard Nuclear - Oak Ridge, TN
- [Chemical Engineer](https://hotfix.jobs/jobs/10b75abd-fb0e-428e-a357-7eaf6b7455b1) - Standard Nuclear - Oak Ridge, TN
- [Robotics Integration Engineer](https://hotfix.jobs/jobs/344a3e08-0820-4441-b62e-f12bd7bbbd11) - Applied Intuition - Sunnyvale, CA - $180k – $210k/yr

**Apply:** https://hotfix.jobs/jobs/cd6b6364-80b3-4463-b71d-ff276ef29a0a
**Canonical:** https://hotfix.jobs/jobs/cd6b6364-80b3-4463-b71d-ff276ef29a0a