# Sr. Staff/Staff Design Verification Engineer

**Company:** [Cerebras Systems](https://hotfix.jobs/companies/cerebras-systems)
**Location:** Sunnyvale, CA
**Role:** Embedded Engineering
**Salary:** $250k – $300k/yr
**Experience:** 10+ years
**Skills:** Systemverilog, Uvm, Dpi, Python, Perl, Rtl Design, Verification Methodologies, Testbench Development, Coverage Analysis, Gate Level Simulation
**Posted:** 2026-06-04

> Lead design verification for wafer-scale AI chips. Develop verification strategies, reusable testbenches, and coverage plans while collaborating with architecture and design teams. Requires 10+ years of experience and deep expertise in SystemVerilog and UVM.

## Job Description

## Key Responsibilities
- Work with architects, designers, post silicon and software engineers to ensure a high-quality design that works first silicon.
- Develop and implement verification strategies, detailed tests and coverage plans based on micro-architecture.
- Create verification methodologies and reusable environments, including components such as stimulus, checkers, assertions, and coverage.
- Implement tests, manage regressions, gather coverage, and debug test failures.
- Collaborate with cross-functional teams including architecture, RTL design, physical design, firmware, and validation.
- Analyze and debug complex issues across simulation, emulation, and silicon bring-up phases.
- Continuously enhances verification infrastructure and flows to improve efficiency and quality.
- Contribute to the evolution of the overall verification methodology and best practices across the organization.

## Skills and Qualifications
- Great debugging and problem-solving skills.
- Deep knowledge of SystemVerilog testbench, DPI and UVM.
- Excellent programming skills and knowledge of software engineering practices including object-oriented design.
- Experience developing scalable and portable testbenches and components.
- Experience with verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection, and gate level simulations.
- Proficient in scripting languages such as Python or Perl.
- Good interpersonal skills and the ability to work as a standout colleague are a must.
- Extremely self-motivated and eager to solve problems.
- 10+ years of Design Verification experience.

## Desired Skills and Qualifications
- Knowledge of pipelined processor architecture.
- BS or MS in Computer Science or Electrical Engineering.
- 10+ years of hands-on Design Verification experience.

## Compensation
- The base salary range for this position is $250,000 to $300,000 annually. Actual compensation may include bonus and equity.

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