# Design Verification, Forward Deployed Engineering

**Company:** [OpenAI](https://hotfix.jobs/companies/openai)
**Location:** San Francisco, CA
**Role:** Solutions Architecture
**Salary:** $162k – $302k/yr
**Experience:** 5+ years
**Skills:** Systemverilog, Uvm, Vcs, Questa, Verdi, Python, Rtl, Constrained-Random Verification, Coverage Analysis, Computer Architecture, Rtl/Microarchitecture, Memory Systems, Coherency, Interconnects
**Posted:** 2026-05-08

> Serves as design verification SME for AI-assisted semiconductor deployments, shaping workflows for test generation, debug, and coverage; curates evaluations, builds prototypes, and grows into full Forward Deployed Engineering role partnering with customers. Requires 5+ years DV experience with SystemVerilog, UVM, and simulation tools.

## Job Description

## Responsibilities
- Serve as the design verification SME for semiconductor deployments, helping teams reason about verification workflows across block, subsystem, and SoC environments
- Shape AI-assisted workflows for test generation, regression triage, debug, root-cause analysis, and coverage closure
- Curate evaluations with FDEs and customer SMEs, including golden tasks, labeled examples, rubrics, acceptance criteria, and realistic benchmarks grounded in solved issues and real engineering workflows
- Build lightweight prototypes, eval harnesses, and tooling that validate opportunities and improve solution quality
- Educate and mentor the broader FDE team on verification concepts, tooling, and methodology so the org can engage semiconductor workflows with greater depth and confidence
- Partner with FDEs during customer discovery and scoping to translate ambiguous pain points into clear solution hypotheses, success criteria, and technical plans
- Support customer-facing technical conversations as a trusted advisor, engaging credibly with technical leaders
- Progressively take on broader FDE responsibilities, including customer discovery, solution architecture, prototype development, production deployment, and ownership of technical workstreams

## Minimum Qualifications
- BS/MS in EE, CE, CS, or equivalent with 5+ years of experience in design verification for complex IP, subsystem, or SoC programs
- Demonstrated success verifying complex hardware systems in industry-standard flows, with deep familiarity in block-, subsystem-, and/or top-level verification methodologies
- Strong hands-on expertise in **SystemVerilog**, **UVM**, and common simulation/debug tools such as **VCS**, **Questa**, **Verdi**, or equivalent
- Strong understanding of constrained-random verification, directed testing, scoreboards, checkers, monitors, stimulus generation, regression infrastructure, and coverage analysis
- Strong knowledge of computer architecture, RTL/microarchitecture, memory systems, coherency, interconnects, and verification methodology
- Experience defining verification plans, triaging bugs, and driving debug and root-cause analysis in close partnership with design teams
- Strong scripting and automation skills in **Python** or similar; experience building verification tooling, harnesses, or workflow automation is a plus
- Comfortable operating as a consultative expert who can shape technical direction, evaluate solution quality, and raise the bar across multiple deployments
- Excited to grow beyond domain SME responsibilities into a broader Forward Deployed Engineering role, including hands-on solution building, customer-facing delivery, and ownership of deployment outcomes

## Preferred Qualifications
- Experience across multiple semiconductor companies, design environments, or tool stacks, with a point of view shaped by different verification cultures and methodologies
- Familiarity with adjacent domains such as RTL design, formal verification, emulation, performance analysis, or physical design
- Experience applying **AI/LLM** systems to semiconductor workflows
- Experience creating reusable evals, methodology assets, or technical playbooks
- Prior experience in customer-facing, consultative, field engineering, solutions engineering, or technical delivery roles

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